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devel/llvm??: Add Mips back to standard backends

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I'd forgotten that STANDARD_BACKENDS is includes _FREEBSD_BACKENDS so
Mips dropped out of the list when it was removed from _FREEBSD_BACKENDS.

PR:		295111
Fixes:		2a7c056120 ("all: drop support for FreeBSD 13, mips and risc64sf")
This commit is contained in:
Brooks Davis
2026-05-11 10:24:23 +01:00
parent 6b80a550ed
commit 4fc6c5e1c9
11 changed files with 11 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
devel/llvm12/Makefile
+1 -1
View File
@@ -289,7 +289,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
MSP430 NVPTX Sparc SystemZ WebAssembly XCore
Mips MSP430 NVPTX Sparc SystemZ WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_AMDGPU= AsmParser Disassembler Utils
devel/llvm13/Makefile
+1 -1
View File
@@ -326,7 +326,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
MSP430 NVPTX Sparc SystemZ WebAssembly XCore
Mips MSP430 NVPTX Sparc SystemZ WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm14/Makefile
+1 -1
View File
@@ -327,7 +327,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm15/Makefile
+1 -1
View File
@@ -349,7 +349,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm16/Makefile
+1 -1
View File
@@ -355,7 +355,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
LoongArch Mips MSP430 NVPTX Sparc SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm17/Makefile
+1 -1
View File
@@ -359,7 +359,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore
LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_INCS_AArch64= arm_sme_draft_spec_subject_to_change.h
_BE_LIBS_AArch64= AsmParser Disassembler Utils
devel/llvm18/Makefile
+1 -1
View File
@@ -363,7 +363,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore
LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm19/Makefile
+1 -1
View File
@@ -380,7 +380,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SystemZ VE WebAssembly XCore
LoongArch Mips MSP430 NVPTX SystemZ VE WebAssembly XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
_BE_LIBS_BACKWARDS_AArch64=Exegesis
devel/llvm20/Makefile
+1 -1
View File
@@ -386,7 +386,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
devel/llvm21/Makefile
+1 -1
View File
@@ -386,7 +386,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils
devel/llvm22/Makefile
+1 -1
View File
@@ -387,7 +387,7 @@ FREEBSD_BACKENDS+= WebAssembly
NATIVE_BACKENDS+= WebAssembly
.endif
STANDARD_BACKENDS= ${_FREEBSD_BACKENDS} AMDGPU AVR BPF Hexagon Lanai \
LoongArch MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
LoongArch Mips MSP430 NVPTX SPIRV SystemZ VE WebAssembly \
XCore
_BE_LIBS_COMMON= CodeGen Desc Info
_BE_LIBS_AArch64= AsmParser Disassembler Utils