 Yuri Victorovich
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dc0d7b0c86
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cad/abc: Update g20180420 -> g20200322
PR: 241511
Approved by: uddka@student.kit.edu (maintainer's timeout; 4.5 months)
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2020-03-22 08:56:58 +00:00 |
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 Sunpoet Po-Chuan Hsieh
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40c9c7f7eb
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Update devel/readline to 8.0
- Bump PORTREVISION of dependent ports for shlib change
Changes: https://tiswww.case.edu/php/chet/readline/CHANGES
PR: 236156
Exp-run by: antoine
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2019-04-09 14:04:49 +00:00 |
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Yuri Victorovich
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e715def410
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New port: cad/abc: System for sequential synthesis and verification
PR: 227254
Submitted by: Christian Krämer <uddka@student.kit.edu>
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2018-04-24 07:53:29 +00:00 |
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