f366d96316
Changes: https://v8.dev/blog/v8-release-96 https://chromium.googlesource.com/v8/v8.git/+log/refs/heads/9.6-lkgr https://github.com/v8/v8/commits/9.6-lkgr
49 lines
2.0 KiB
C
49 lines
2.0 KiB
C
--- third_party/zlib/cpu_features.c.orig 2020-11-16 14:31:04 UTC
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+++ third_party/zlib/cpu_features.c
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@@ -31,11 +31,20 @@ int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
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#ifndef CPU_NO_SIMD
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-#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA)
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+#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_FUCHSIA) || defined(ARMV8_OS_FREEBSD)
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#include <pthread.h>
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#endif
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-#if defined(ARMV8_OS_ANDROID)
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+#if defined(ARMV8_OS_FREEBSD)
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+#include <machine/armreg.h>
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+#include <sys/types.h>
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+#ifndef ID_AA64ISAR0_AES_VAL
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+#define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
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+#endif
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+#ifndef ID_AA64ISAR0_CRC32_VAL
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+#define ID_AA64ISAR0_CRC32_VAL ID_AA64ISAR0_CRC32
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+#endif
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+#elif defined(ARMV8_OS_ANDROID)
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#include <cpu-features.h>
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#elif defined(ARMV8_OS_LINUX)
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#include <asm/hwcap.h>
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@@ -56,7 +65,7 @@ int ZLIB_INTERNAL x86_cpu_enable_simd = 0;
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static void _cpu_check_features(void);
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#endif
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-#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_MACOS) || defined(ARMV8_OS_FUCHSIA) || defined(X86_NOT_WINDOWS)
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+#if defined(ARMV8_OS_ANDROID) || defined(ARMV8_OS_LINUX) || defined(ARMV8_OS_MACOS) || defined(ARMV8_OS_FUCHSIA) || defined(X86_NOT_WINDOWS) || defined(ARMV8_OS_FREEBSD)
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#if !defined(ARMV8_OS_MACOS)
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// _cpu_check_features() doesn't need to do anything on mac/arm since all
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// features are known at build time, so don't call it.
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@@ -123,6 +132,13 @@ static void _cpu_check_features(void)
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#elif defined(ARMV8_OS_WINDOWS)
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arm_cpu_enable_crc32 = IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
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arm_cpu_enable_pmull = IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
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+#elif defined(ARMV8_OS_FREEBSD)
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+ uint64_t id_aa64isar0;
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+ id_aa64isar0 = READ_SPECIALREG(id_aa64isar0_el1);
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+ if (ID_AA64ISAR0_AES_VAL(id_aa64isar0) == ID_AA64ISAR0_AES_PMULL)
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+ arm_cpu_enable_pmull = 1;
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+ if (ID_AA64ISAR0_CRC32_VAL(id_aa64isar0) == ID_AA64ISAR0_CRC32_BASE)
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+ arm_cpu_enable_crc32 = 1;
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#endif
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}
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#endif
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